Design-Reuse

SPI Master Controller w/FIFO (AHB & AHB-Lite Bus)

The Digital Blocks DB-SPI-M is a Serial Port Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (both Full Duplex and ...
Design-Reuse

SPI Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus)

The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS ...