Exhaustive functional coverage promises to revolutionize the design of ICs and other digital systems. Exhaustive coverage is now a genuine possibility because the scientific and mathematical ...

This article formalizes the concept of best possible verification quality — completeness — and describes a methodology, field-proven on many complex module and intellectual property (IP) designs, that ...

System-on-a-chip (SoC) functional verification involves integrating multiple intellectual property (IP) blocks. Accordingly, understanding how to define, measure, correlate, and analyze appropriate IP ...

The manufacturing aspects of multi-die/multi-chiplet designs are often highlighted, but what about verification? Functional correctness and performance of inter-die connections via a standard ...

This paper discusses the functional verification of IP cores and problems which arise during their implemenation in today’s advanced applications. First, the usual approach to functional ...

In the past five years, few topics have received more attention in the trade press than design reuse. As system-on-chip (SoC) devices increase in complexity, resources become more scarce and market ...

FPGA engineers are all doing functional verification using manual processes but growing system comlexity is the issue. Changing tools and methodologies may seem daunting, but there is a way to break ...